ver: 0.2 mar 07, 2012 tel: 886-3-5788833 http://www.gmt.com.tw 1 G3212 global mixed-mode technology low capacitance vga 2:2 dual-graphics cross- over switch features ? low on-resistance 5 (typical), rgb signal ? low supply current <5 a (max) ? high bandwidth, 700mhz (typical), rgb ? ddc level shifting, isolation with internal pullup termination, and protection ? horizontal and vertical sync level shifting and buffering ? inputs compatible with v l , outputs ttl com- patible ? source/sink 10ma on each sh_, sv_ output ? independent selectable logic inputs for switching ? high esd protection on outputs: 15kv hbm esd 6kv iec 61000-4-2 contact discharge ? tqfn 5x5 40 pins package with exposed pad applications ? notebook computer-switchable graphics ordering information order number markin g temp. range package (green) G3212rg1u 3212 -40 c to 85 c tqfn5x5-40 note: rg: tqfn5x5-40 1: bonding code u: tape & reel general description the G3212 integrates high-bandwidth analog switches, level-shifting buffers and level-translating fet switches. the device implements a complete 2:2 dual-graphics crossover solution for vga signal switching. the G3212 provides 12 very high-frequency 700mhz spst switches for rgb signals, 4 low- frequency clamping switches for the display data channel(ddc) signals, 2 pairs of level-shifting buffers for the hsync and vsync signals, and also integrated extended esd protection. the G3212 is used to select one of two sources to either of two destinations within a laptop computer. horizontal and vertical synchronization (sh_/sv_) inputs feature level-shifting buffers to support low- voltage controllers and standard 5v ttl-level moni- tors. ddc, consisting of sda_ and scl_, are fet switches that protect the low-voltage vga source from potential damage from high-voltage presence on the monitor while reducing capacitive load. all 14 output terminals of the G3212feature high-esd protection to 15kv human body model (hbm) and 6kv iec 61000-4-2 contact. all other pins are pro- tected to 2kv hbm. the G3212 is available in the tqfn5x5-40 package with exposed pad. pin configuration sclb vl nc shb svb sdab redb grnb blub gnd vcc s01 s00 en sha scla sdaa reda grna blua gnd s10 s11 sh1 sv1 scl1 sda1 red1 vcc sh2 sv2 scl2 sda2 red2 grn2 blu2 G3212 tqfn5x5-40 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 thermal pad 30 29 28 27 26 25 24 23 22 21 40 39 38 37 36 35 34 33 32 31 blu1 grn1 sva gnd note: recommend connecting the thermal pad to the ground for excellent power dissipation. sclb vl nc shb svb sdab redb grnb blub gnd vcc s01 s00 en sha scla sdaa reda grna blua gnd s10 s11 sh1 sv1 scl1 sda1 red1 vcc sh2 sv2 scl2 sda2 red2 grn2 blu2 G3212 tqfn5x5-40 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 thermal pad 30 29 28 27 26 25 24 23 22 21 40 39 38 37 36 35 34 33 32 31 blu1 grn1 sva gnd note: recommend connecting the thermal pad to the ground for excellent power dissipation.
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